PART |
Description |
Maker |
MIC2165YMME MIC21651011 |
Adaptive On-Time DC-DC Controller Featuring HyperLight Load?
|
Micrel Semiconductor
|
CAT64LC20ZS CAT64LC20ZP CAT64LC20J-TE7 CAT64LC20J- |
36-Mbit QDR-II SRAM 4-Word Burst Architecture 36-Mbit QDR-II SRAM 2-Word Burst Architecture 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL Architecture 4-Mbit (128K x 36) Pipelined SRAM with NoBL Architecture 4-Mbit (128K x 36) Flow-through SRAM with NoBL Architecture 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture SPI Serial EEPROM SPI串行EEPROM 36-Mbit QDR™-II SRAM 2-Word Burst Architecture SPI串行EEPROM 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM SPI串行EEPROM 256K (32K x 8) Static RAM SPI串行EEPROM
|
Analog Devices, Inc. Electronic Theatre Controls, Inc.
|
CAT64LC40ZJ CAT64LC40ZS CAT64LC40J-TE7 CAT64LC40J- |
72-Mbit QDR-II SRAM 2-Word Burst Architecture 72-Mbit QDR-II SRAM 4-Word Burst Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture SPI Serial EEPROM SPI串行EEPROM 72-Mbit QDR-II™ SRAM 2-Word Burst Architecture SPI串行EEPROM 72-Mbit QDR™-II SRAM 2-Word Burst Architecture
|
Analog Devices, Inc.
|
CAT64LC10ZJ CAT64LC10ZP CAT64LC10J-TE7 CAT64LC10J- |
18-Mbit QDR-II SRAM 4-Word Burst Architecture 18-Mbit DDR-II SRAM 2-Word Burst Architecture 36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 4-Mbit (256K x 18) Flow-Through Sync SRAM SPI串行EEPROM SPI Serial EEPROM SPI串行EEPROM
|
Analog Devices, Inc.
|
CY7C1415BV18-250BZI CY7C1415BV18-167BZI |
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 1M X 36 QDR SRAM, 0.45 ns, PBGA165 36-Mbit QDR™-II SRAM 4-Word Burst Architecture
|
Cypress Semiconductor, Corp. CYPRESS SEMICONDUCTOR CORP
|
CY7C1515KV18-250BZXI CY7C1515KV18-300BZC CY7C1515K |
72-Mbit QDR II SRAM 4-Word Burst Architecture 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 QDR SRAM, 0.45 ns, PBGA165
|
http:// Cypress Semiconductor, Corp.
|
CY7C1472BV25-167BZXC CY7C1472BV25-167BZXI CY7C1472 |
2M X 36 ZBT SRAM, 3 ns, PBGA165 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL垄芒 Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL?/a> Architecture
|
CYPRESS SEMICONDUCTOR CORP
|
SSM2000S SSM2000P SSM2000 SSM2000-15 |
HUSHStereo Noise Reduction System with Adaptive Threshold HUSH Stereo Noise Reduction System with Adaptive Threshold
|
Analog Devices, Inc.
|
UPD4264405G5-A50-7JD UPD4265405G5-A50-7JD UPD42S65 |
2-Mbit (128K x 18) Flow-Through SRAM with NoBL Architecture x4 EDO Page Mode DRAM 512K (32K x 16) Static RAM 36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 128K x 8 Static RAM 128K的8静态RAM
|
Omron Electronics, LLC
|
CY7C1518JV18-250BZC CY7C1518JV18-300BZXC |
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|